LAYERS 9 – Photonic integration in the AI era
In a joint article by Yole Group and Evatec, the rapidly evolving landscape of photonic integrated circuits (PICs) is examined against the backdrop of growing AI clusters and hyperscale cloud data centers.
As bandwidth and energy‑efficiency requirements continue to rise, silicon photonics (SOI) remains the dominant platform due to its CMOS compatibility and scalable manufacturing. However, data rates beyond 400 Gbps per lane are accelerating the evaluation of alternative materials such as lithium niobate on insulator (LNOI) and indium phosphide (InP), which offer strong performance advantages but also introduce challenges related to cost, yield and mass production.
The contribution highlights two key industry strategies: increasing speed per lane and adopting “slow and wide” architectures with more parallel optical lanes. Both approaches aim to balance performance, power consumption and total cost of ownership for next‑generation optical interconnects.
With expertise in advanced thin‑film deposition and low‑loss photonic waveguides, Evatec supports PIC manufacturing from development to high‑volume production, helping enable the optical infrastructure required for the AI era.
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